Computer systems commonly use busses to transfer data between devices that include processors, storage devices and input/output (I/O) devices. Many of such busses use one or more data lines, which are electrical conductors on which signals are used to transfer data in concert with a clock signal and/or one or more control signals. In a ternary bus, each device must use the data it is transmitting to derive the data being received, and debugging such a bus to diagnose problems or confirm functionality is rendered more difficult. Diagnostic tools, such as a logic analyzer, have failed to monitor the data being transferred between two devices by the simple attachment of probes to the conductors of a ternary bus. Further, as computer systems move towards the use of multi-stage pipelines and large symmetric multiprocessor (SMP) shared cache structures, the ability to debug, analyze, and verify actual hardware becomes increasingly difficult, during development, testing, and normal operations.